Sharp MZ-3500 Bedienungsanleitung Seite 10

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Seitenansicht 9
ROM-IPL
1. An 8KB ROM (2764 or mask ROM equivalent) is used
for the ROM-IPL.
2. When the system reset signal turns from low to high
state after power on, the main CPU starts to operate At
this stage, the ROM-IPL is addressed.
3. The CPU starts from address OOOOIROM address 10000)
4. The main CPU sets the sub-CPU reset signal from low to
high state as it goes out of its initial state via the memory
mapper and the sub-CPU starts to operate. At this point,
the ROM-IPL is addressed by the sub-CPU.
5. Address 0000 of the sub-CPU is ROM address (0000)
The memory area above ROM address (1000) cannot
be used by the sub-CPU because the mam CPU initial
program has been loaded there.
2-2. SDÌ (SYSTEM LOADING & CP/M)
SDÌ determines which operating system is in use. The
system is loaded in the CP/M (Control Program for Micro
processors) mode.
MZS.'tOO
Mam CPU logical address (during IPL operation)
Logical address of the sub-CPU
ROM physical address
МЫ = 0( L)
WS0=l(Hj
FFFF
i
P800
F7FF
*
i. Л 0 n
\
' \
\\
\ \
\ \
\ \
\ \
\ \
\ \
\ \
\ \
V \
\ \
\ \
\ \
\ \
\ \
\'
-----
T
RAM
sn
RAM
SC
RAM
SB
RAM
SA
5FFF
5800
57FF
5000
4FFF
4800
47FF
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