
MZ3500
4) Graphic VRAM memory (MZIR03)
• Block Diagram
1. read/wnte Mode
The select signal RASA, RASB and RASC are generate from
R AS, A14 and A15 which is signal of GDC-2.
The address »5 allocated to each area selected by above signal.
Read/write by Z-80 via the GDC
(1) 640 X 200 dots display mode
together. By the DBiN signal from GDC-2, 08/16 signal is gener
ated by CSP-2.
The signal of 08/16 select, after P-5 conversion for RAMA,
RAMB output signal then output to VB by serial signal, or sprit
the signal to VB and VR.
(08/16 select: 08 for 200 rasters, 16 for 400 rasters}
During displaying
Low High
byte byte
Option I #BFFF
(48K byte)
8bit structure
+ 8000
#4000
#0000
I I
I t
I
I
16K
#3FFF
#0000
8bit
B/W: 3 frames
Color: 1 frame
8bu
16K
8b it 8bit
Option II # BFFF
(96K byte)
16bit structure
# 8000
# 4 0 0 0
+ 00 00
16K
B/W: 6 frames
Color: 2 frames
I6K
I6bit
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