
ER-OIPU
2) Blockdiagram
II
1
Al 9
Al 8
Al 7
Al 6
Al 5
Al 4
Al 3
II
Interruption
controller
c-
+
/
—
DMA
—
controller
RAM
512bytes
P62
P61
WAIT
n
Reflesh
n
controller
n
a
I
A7
A6
A5
A4
A3
A2
Al
AO
Cso
IRQ3
CS2
CS3
IRQO
I
16bit
integrated
timer unit
(ITU)
u
Watch dog timer
m
(WDT)
>
I
I
\
timming patarn
I I I Seriai communication ~—~
u
interface
/ \
(SCI) X2ch
—
PC7
PC6
PC5
PC4
‘i
g
CS5 o
CS4
Pcl
Pco
;
IRQ5
SCKO
m
RXD1
r
z
RXD1
TXD1
TXDO
A/d converter
n
r!
12-3
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