Sharp SD-AT1000W Spezifikationen PDF herunterladen (Seite 173)

Maxiva UAX

October 17, 2013

4‐9

888‐2693‐004 WARNING:Disconnectprimarypower priortoservicing.

ForNICAMsoundsystems,theauxaudioinputsareusedformodulatingtheNICAMcarrier,whereasthemainaudio

inputdataarefedtotheanalogFMmodulator.

4.3.3 ASI/SMPTE310Inputs

Forallmodulationformats,exceptanalogtelevision,thedigitaltransportstreamtothetransmitteriscodedinASIor

SMPTEformat.Thefollowing75‐ohmBNCinputconnectorsareprovidedontherearpaneloftheLPU.

• ASI1/HP1

• ASI2/LP1

• SMPTE(310)1/HP2

• SMPTE(310)2/LP2

LP1andLP2inp

utsareusedonlyforCOFDMhierarchicalmodes.

Transformersar

eusedontheinputoftheASIdatatoimprovetherejectionofcommonmodeinterferenceonthe

inputcables.Cableequalizationcircuitryisalsoused.TheASIinputstotheFPGAareatLVDSlevels.

Themodula

torFPGAalsoprovidesanASImonitoroutput.TheASImonitoroutputisatLVDSlevelsfromtheFPGA.It

utilizesanLVDSdriverandtransformerpertheASIspecification.

Theseco

dingformatsallowtheclocksignaltoberecoveredfromthedatastream,insteadofrequiringseparate

clockanddatapaths.Theclockrecoveredfromthetransportstreamisusedtophaselocktheclocksrequiredto

synchronizeseveralcircuitsinthesignalprocessingboard.

4.3.4 ModulatorFPGA

WhentheLPUoperatesinthedigitalmode,themodulatorFPGAaddsforwarderrorcorrection,suchasdata

randomization,Reed‐Solomoncoding,datainterleaving,andtrelliscoding,totheincomingtransportstream.Any

requiredsegmentsyncsignalsarealsoaddedatthisstage.ForCOFDMmodulationformats,frequencydivision

multiplexmodulationisperf

ormedviaIFFTprocessing.FortheATSCmodulationformat,AM‐VSBisperformed

accordingtothatstandard.Thesignalisalsoband‐limitedusingadigitalfilter.

Whenth

eLPUisusedwithanalogmodulationformats,theanalog vi deoandaudioaredigitized,andtheresulting

digitaldataandclockareusedtodrivethecircuitsinthesignalprocessingboard.Allofthetraditionalmodulation

functions(e.g.AMVSBforvideo,FMforsound)areperformedentirelyinthedig

italdomain.

TheFPGAmodula

torsendsthedigitized,processed,andbandpassfilteredIFsignaltothedigitalprecorrectorcircuit.

4.3.5 DUCFPGA

TheDUC(DigitalUpConverter)FPGAisresponsiblefortakingthemodulateddataandapplyingcorrectiontoit.The

RTAC™(RealTimeAdaptiveCorrection)correctionimplementedbytheDUCseekstopre‐distorttheLPU’sRFoutput

tocompensatefornaturally‐occurringdistortionsinthehighpoweramplifierandRFoutputfi

lterstagesofthe

transmitter.Dependingonthemodulationformatbeingemployed,thefinalresultmaymanifestitselfasimproved

EVM(ErrorVectorMagnitude),improvedMER(ModulationErrorRate),and/orreducedintermodulationproductsin

thetransmittedspectrum.

Whenuse

dwithdigitalmodulationformats,RTACcanbesettore‐adaptautomaticallytopmaintaintop

performanceatalltimesorplacedinaholdmodetoimplementafixedprecorrection.

Whenuse

dwithanalogmodulationformats,RTACrequirestheuseofanoff‐linetrainingsignal(modulatedramp)

andoperatesonlyinahold/fixedmodeduringnormaltransmissions.

Thefullypr

ocessedandprecorrecteddigitizedIFsignalisprocessedintoa140MHz(centerfrequency)IFbyaDAC

(DigitaltoAnalogConverter)followingtheDUCFPGA.TheDUCFPGAwritesthe16‐bitIandQdatatotheDAC.The

DACisclockedbythe~409to460MHzcl

ockfromthePFRU.The1/4FDACclockoutputoftheDACisusedasaclock

fortheDUCFPGAandtheRFSampleADC.

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Philips HD4659/53 Manual de usuario (15 paginas)

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